"Chiplet Security Risks Underestimated"

There is the promise of chiplets within the semiconductor ecosystem, but security in these chiplets and the heterogeneous systems into which they will be implemented needs more attention. Disaggregating a System-on-Chip (SoC) into a chiplet changes the cybersecurity threat landscape. Chiplets can be developed anywhere and at any process node, unlike monolithic multi-function chips, which are typically produced using the same process technology. One of the primary reasons for developing heterogeneous chiplets is that not all functions benefit from the most advanced process technology, nor can they all fit on a single die. However, this increases the threat level, and the industry needs help to address security issues in a repeatable and cost-effective manner. Integrating multiple chiplets into a heterogeneous package introduces security incidents and potential risks associated with malicious modifications or attacks on individual chiplets during design, assembly, or testing. Additionally, since chiplets are often designed and manufactured by various vendors, there is a possibility that a malicious actor could compromise one of the vendors and use that access to compromise the entire chiplet-based system. This article continues to discuss the magnitude of the security challenges for commercial chiplets.

semiEngineering reports "Chiplet Security Risks Underestimated"

Submitted by Anonymous on