Embedded System Security 2015

Embedded systems security aims for comprehensive security across hardware, platform software (including operating systems and hypervisors), software development processes, data protection protocols (both networking and storage), and cryptography. Critics say embedded device manufacturers often lack maturity when it comes to designing secure embedded systems. They say vendors in the embedded device and critical infrastructure market are starting to conduct classic threat modeling and risk analysis on their equipment, but they have not matured to the point of developing formal secure development standards. Research is beginning to bridge the gap between promise and performance, as the articles cited here, suggest. For the Science of Security, this research addresses resilience, composability, and metrics. The work cited here was published in 2015.

Yuan-Wei Tseng; Chong-Yu Liao; Tzung-Huei Hung, “An Embedded System with Realtime Surveillance Application,”

in Next-Generation Electronics (ISNE), 2015 International Symposium on, vol., no., pp. 1–4, 4–6 May 2015. doi:10.1109/ISNE.2015.7132031

Abstract: To reduce the manpower and response time for surveillance systems at low cost, in this paper, an ARM-based embedded system dedicated for unattended realtime moving target detection is constructed. The comprehensive procedures in building up an embedded system such as setup environment for cross-compilation, migration of Bootloader, migration of Linux-2.6 kernel, fabrication and migration of root document system and setup of peripheral driving devices have been presented. The algorithm of image background subtraction for moving target detection and tracking technology has been presented. In this embedded system, for two consecutive 640×480 image frames captured by camera, if the difference of 8-bit gray level value of a pixel at the same position is greater than 32, that pixel is marked as a “moving pixel”. When there are more than 500 moving pixels in two consecutive image frames, the camera is triggered to take pictures because the system assumes that a moving “invader” appears. Consequently, the system will transfer the taken invader’s pictures to “The Cloud” through WiFi to prevent the pictures being destroyed by the invader. The constructed embedded system can be used in a security system and other applications with proper modifications.

Keywords: cameras; cloud computing; embedded systems; image capture; image motion analysis; microcontrollers; object detection; object tracking; video surveillance; wireless LAN; ARM-based embedded system; Bootloader; Linux-2.6 kernel; The Cloud; WiFi; camera; consecutive image frames; cross-compilation; image background subtraction; image frame capture; moving invader; moving target detection technology; moving target tracking technology; peripheral driving devices; realtime surveillance application; root document system; surveillance systems; unattended realtime moving target detection; Cameras; Embedded systems; Kernel; Linux; Program processors; Surveillance; ARM; Lunix; embedded system; moving target detection; realtime (ID#: 15-7494)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7132031&isnumber=7131937

Papp, Dorottya; Zhendong Ma; Buttyan, Levente, “Embedded Systems Security: Threats, Vulnerabilities, and Attack Taxonomy,” in Privacy, Security and Trust (PST), 2015 13th Annual Conference on, vol., no., pp. 145–152, 21–23 July 2015. doi:10.1109/PST.2015.7232966

Abstract: Embedded systems are the driving force for technological development in many domains such as automotive, healthcare, and industrial control in the emerging post-PC era. As more and more computational and networked devices are integrated into all aspects of our lives in a pervasive and “invisible” way, security becomes critical for the dependability of all smart or intelligent systems built upon these embedded systems. In this paper, we conduct a systematic review of the existing threats and vulnerabilities in embedded systems based on public available data. Moreover, based on the information, we derive an attack taxonomy for embedded systems. We envision that the findings in this paper provide a valuable insight of the threat landscape facing embedded systems. The knowledge can be used for a better understanding and the identification of security risks in system analysis and design.

Keywords: embedded systems; security of data; attack taxonomy; embedded system threat; embedded system vulnerabilities; embedded systems security; security risk identification; system analysis; system design; Authentication; Cryptography; Embedded systems; Protocols; Taxonomy (ID#: 15-7495)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7232966&isnumber=7232940

Sadeghi, A.-R.; Wachsmann, C.; Waidner, M., “Security and Privacy Challenges in Industrial Internet of Things,” in Design Automation Conference (DAC), 2015 52nd ACM/EDAC/IEEE, vol., no., pp. 1–6, 8–12 June 2015. doi:10.1145/2744769.2747942

Abstract: Today, embedded, mobile, and cyberphysical systems are ubiquitous and used in many applications, from industrial control systems, modern vehicles, to critical infrastructure. Current trends and initiatives, such as “Industrie 4.0” and Internet of Things (IoT), promise innovative business models and novel user experiences through strong connectivity and effective use of next generation of embedded devices. These systems generate, process, and exchange vast amounts of security-critical and privacy-sensitive data, which makes them attractive targets of attacks. Cyberattacks on IoT systems are very critical since they may cause physical damage and even threaten human lives. The complexity of these systems and the potential impact of cyberattacks bring upon new threats. This paper gives an introduction to Industrial IoT systems, the related security and privacy challenges, and an outlook on possible solutions towards a holistic security framework for Industrial IoT systems.

Keywords: Internet of Things; data privacy; embedded systems; industrial control; mobile computing; security of data; Industrie 4.0; business models; cyberattacks; cyberphysical system; embedded system; industrial Internet of Things; industrial IoT systems; industrial control systems; mobile system; privacy-sensitive data; security-critical data; user experiences; Computer architecture; Privacy; Production facilities; Production systems; Security; Software (ID#: 15-7496)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7167238&isnumber=7167177

Yong Up Lee; Sang-Myeong Lee; Jeong-Uk Park, “Two Embedded System Design Techniques for Wireless Remote Monitoring Service,” in Digital Information, Networking, and Wireless Communications (DINWC), 2015 Third International Conference on, vol., no., pp. 121–126, 3–5 Feb. 2015. doi:10.1109/DINWC.2015.7054229

Abstract: In order to upgrade the conventional remote monitoring service, the two embedded system design and implementation methods for the wireless remote monitoring service, which provide a wireless image observation with temporary ad-hoc network, are proposed in this paper. The first method is based on the embedded system design technique for a nearly real-time wireless image observation application service and has the maximum 1 fps (frame per second) transmission rate capability per a 160×128 pixel image. The second technique uses the embedded system for an ordinary wireless long-time observation application service with the wireless image transmission rate capability of 0.33 fps.

Keywords: ad hoc networks; computerised instrumentation; embedded systems; embedded system design techniques; real-time wireless image observation application service; temporary ad-hoc network; transmission rate capability; wireless image observation; wireless image transmission rate capability; wireless long-time observation application service; wireless remote monitoring service; Ad hoc networks; Cameras; Communication system security; Remote monitoring; Wireless communication; Wireless sensor networks; ad-hoc networking; embedded system design; implementation technique; performance analysis; wireless remote monitoring (ID#: 15-7497)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7054229&isnumber=7054206

Wang Zai-ying; Chen Liu, “Design of Mobile Phone Video Surveillance System for Home Security Based on Embedded System,” in Control and Decision Conference (CCDC), 2015 27th Chinese, vol., no., pp. 5856–5859, 23–25 May 2015. doi:10.1109/CCDC.2015.7161856

Abstract: As the speedy development of national economy and the escalation of living standard, people’s awareness of Home Security is increasing day by day, the demand for the convenient, mobile and real-time alarm video terminal is rising rapidly. Based on the development of embedded network technology and intelligent mobile phone used widely, the design for Home Security is put forward, which consists of the embedded camera for monitoring front and the intelligent mobile phone for monitoring terminal, finally to realize video monitoring through the mobile device. The monitoring front of system: S3C2440 microprocessor is selected as the hardware core of embedded system, Linux is selected as the embedded operating system, whose function is for coding and compressing the real-time image. The system’s network part adopts China Unicom’s WCDMA Technology and the RTP/RTCP protocol of supporting transmission of streaming media, whose function is for transmitting and packing data. Intelligent mobile phone is used as the monitoring terminal, whose function is for receiving and displaying data. Through the preliminary analysis and verification, the design is reasonable and can achieve the desired requirements.

Keywords: Linux; alarm systems; code division multiple access; embedded systems; home automation; media streaming; microprocessor chips; mobile computing; mobile handsets; transport protocols; video surveillance; China Unicom; Linux RTP/RTCP protocol; S3C2440 microprocessor; WCDMA technology; embedded camera; embedded network technology; embedded operating system; embedded system; hardware core; home security; intelligent mobile phone; living standard; mobile device; mobile phone video surveillance system; monitoring front; monitoring terminal; national economy; real-time alarm video terminal; real-time image; speedy development; streaming media; video monitoring; Decoding; Kernel; Linux; Mobile handsets; Monitoring; Servers; Streaming media; Embedded; Home Security; Intelligent Mobile Phone; RTP/RTCP; S3C2440; WCDMA (ID#: 15-7498)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7161856&isnumber=7161655

Tripathy, A.K.; Chopra, S.; Bosco, S.; Shetty, S.; Sayyed, F., “Travolution — An Embedded System in Passenger Car for Road Safety,” in Technologies for Sustainable Development (ICTSD), 2015 International Conference on, vol., no., pp. 1–6, 4–6 Feb. 2015. doi:10.1109/ICTSD.2015.7095885

Abstract: Each year, there are thousands of highway deaths and tens of thousands of serious injuries due to “Run-Off-Road” accidents. Everything from simple driver inattentiveness, to fatigue, callousness, to drunk driving, is responsible. Simple sensors can be fitted inside vehicles embedded with various features like, automatic collision notification, vehicle security, speed control which can give impetus to an efficient road safety system. The features that are proposed in this work are: Automatic collision notification that gives notification to the victim’s relative, Red light traffic control makes sure vehicle doesn’t break signal, Speed control alters speed in different zones, Horn control prevents honking in horn prohibited zone, Alcohol detection detects drunk driving and Vehicle security is used to prevent theft.

Keywords: automobiles; collision avoidance; driver information systems; road accidents; road safety; road traffic control; velocity control; alcohol detection; automatic collision notification; driver inattentiveness; drunk driving; embedded system; horn control; passenger car; red light traffic control; run-off-road accident; speed control; travolution; vehicle security; GSM; Modems; Receivers; Relays; Sensors; Switches; Vehicles; Collision Notification; Embedded System; GPS (Global Positioning System); GSM (Global System for Mobile Communication); Road safety (ID#: 15-7499)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7095885&isnumber=7095833

Agosta, G.; Barenghi, A.; Pelosi, G.; Scandale, M., “Information Leakage Chaff: Feeding Red Herrings to Side Channel Attackers,” in Design Automation Conference (DAC), 2015 52nd ACM/EDAC/IEEE, vol., no., pp. 1–6, 8–12 June 2015. doi:10.1145/2744769.2744859

Abstract: A prominent threat to embedded systems security is represented by side-channel attacks: they have proven effective in breaching confidentiality, violating trust guarantees and IP protection schemes. State-of-the-art countermeasures reduce the leaked information to prevent the attacker from retrieving the secret key of the cipher. We propose an alternate defense strategy augmenting the regular information leakage with false targets, quite like chaff countermeasures against radars, hiding the correct secret key among a volley of chaff targets. This in turn feeds the attacker with a large amount of invalid keys, which can be used to trigger an alarm whenever the attack attempts a content forgery using them, thus providing a reactive security measure. We realized a LLVM compiler pass able to automatically apply the proposed countermeasure to software implementations of block ciphers. We provide effectiveness and efficiency results on an AES implementation running on an ARM Cortex-M4 showing performance overheads comparable with state-of-the-art countermeasures.

Keywords: cryptography; program compilers; trusted computing; AES implementation; ARM Cortex-M4; IP protection schemes; LLVM compiler; confidentiality breaching; content forgery; defense strategy; embedded system security; information leakage chaff; reactive security measure; side channel attackers; software implementations; trust guarantees; Ciphers; Correlation; Optimization; Software; Switches; Embedded Security; Side Channel Attacks; Software Countermeasures (ID#: 15-7500)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7167217&isnumber=7167177

Yoshikawa, M.; Sugioka, K.; Nozaki, Y.; Asahi, K., “Secure in-Vehicle Systems Against Trojan Attacks,” in Computer and Information Science (ICIS), 2015 IEEE/ACIS 14th International Conference on, vol., no., pp. 29–33, June 28 2015–July 1 2015. doi:10.1109/ICIS.2015.7166565

Abstract: Recently, driving support technologies, such as inter-vehicle and road-to-vehicle communication technologies, have been practically used. However, a problem has been pointed out that when a vehicle is connected with an external network, the safety of the vehicle is threatened. As a result, the security of vehicle control systems, which greatly affects vehicle safety, has become more important than ever. Ensuring the security of in-vehicle systems becomes an important priority, similar to ensuring conventional safety. The present study proposes a controller area network (CAN) communications method that uses a lightweight cipher to realize secure in-vehicle systems. The present study also constructs an evaluation system using a field-programmable gate array (FPGA) board and a radio-controlled car. This is used to verify the proposed method.

Keywords: controller area networks; cryptographic protocols; field programmable gate arrays; invasive software; vehicular ad hoc networks; CAN communication method; FPGA; Trojan attack; controller area network communication method; field-programmable gate array; inter-vehicle communication technology; lightweight cipher; radio-controlled car; road-to-vehicle communication technology; vehicle control system security; Authentication; Ciphers; Encryption; Radiation detectors; Safety; Vehicles; CAN communication; Embedded system; Lightweight block cipher; Security (ID#: 15-7501)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7166565&isnumber=7166553

Bobade, S.D.; Mankar, V.R., “VLSI Architecture for an Area Efficient Elliptic Curve Cryptographic Processor for Embedded Systems,” in Industrial Instrumentation and Control (ICIC), 2015 International Conference on, vol., no., pp. 1038–1043, 28–30 May 2015. doi:10.1109/IIC.2015.7150899

Abstract: Elliptic curve cryptography has established itself as a perfect cryptographic tool in embedded environment because of its compact key sizes and security strength at par with that of any other standard public key algorithms. Several FPGA implementations of ECC processor suited for embedded system have been consistently proposed, with a prime focus area being space and time complexities. In this paper, we have modified double point multiplication algorithm and replaced traditional Karatsuba multiplier in ECC processor with a novel modular multiplier. Designed Modular multiplier follows systolic approach of processing the words. Instead of processing vector polynomial bit by bit or in parallel, proposed multiplier recursively processes data as 16-bit words. This multiplier when employed in ECC processor reduces drastically the total area utilization. The complete modular multiplier and ECC processor module is synthesized and simulated using Xilinx 14.4 software. Experimental findings show a remarkable improvement in area efficiency, when comparing with other such architectures.

Keywords: VLSI; computational complexity; embedded systems; field programmable gate arrays; multiplying circuits; public key cryptography; ECC processor; FPGA implementations; VLSI architecture; Xilinx 14.4 software; area efficient elliptic curve cryptographic processor; cryptographic tool; double point multiplication algorithm; embedded environment; embedded system; field programmable gate array; modular multiplier; public key algorithms; security strength; space complexities; systolic approach; time complexities; total area utilization vector polynomial bit; words processing; Encryption; Integrated circuits; Latches; Elliptic Curve Cryptography; double point multiplication; finite field multiplier; public key Cryptography; security (ID#: 15-7502)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7150899&isnumber=7150576

Raj, M.M.E.; Julian, A., “Design and Implementation of Anti-Theft ATM Machine Using Embedded Systems,” in Circuit, Power and Computing Technologies (ICCPCT), 2015 International Conference on, vol., no., pp. 1–5, 19–20 March 2015. doi:10.1109/ICCPCT.2015.7159316

Abstract: Automated Teller Machines (ATMs) security is the field of study that aims at solutions that provide multiple points of protection against physical and electronic theft from ATMs and protecting their installations. From anti-skimming defend systems to silent indicate systems, integrated ATM video surveillance cameras and ATM monitoring options, security specialists are ready to help the people get more out of the ATM security and ATM loss prevention systems. The implementation is achieved with the use of Machine-to-machine (M2M) communications technology. M2M communications is a topic that has recently attracted much attention It provides real-time monitoring and control without the need for human intervention. The idea of M2M platform suggests new system architecture for positioning and monitoring applications with wider coverage and higher communication efficiency. The aim of the proposed work is to implement a low cost stand-alone Embedded Web Server (EWS) based on ARM11 processor and Linux operating system using Raspberry Pi. It offers a robust networking solution with wide range of application areas over internet. The Web server can be run on an embedded system having limited resources to serve embedded web page to a web browser. The setup is proposed for ATM security, comprising of the modules namely, authentication of shutter lock, web enabled control, sensors and camera control.

Keywords: Web sites; automatic teller machines; computer crime; computerised monitoring; data protection; embedded systems; message authentication; software architecture; video cameras; video surveillance; ARM11 processor; ATM loss prevention systems; ATM monitoring; ATM security; ATM video surveillance cameras; EWS; Linux operating system; M2M communications technology; M2M platform; Raspberry Pi; Web browser; Web enabled control; anti-skimming defend systems; anti-theft ATM machine; automated teller machines security; camera control; communication efficiency; electronic theft; embedded Web page; embedded Web server; installations protection; machine-to-machine communications technology; monitoring applications; physical theft; positioning applications; real-time monitoring; sensors; shutter lock authentication; silent indicate systems; system architecture; Computers; Monitoring; Online banking; Radio frequency; Radiofrequency identification; Security; Web servers; Embedded System; M2M; RF Communication; Web Server (ID#: 15-7503)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7159316&isnumber=7159156

Shinde, A.S.; Bendre, V., “An Embedded Fingerprint Authentication System,” in Computing Communication Control and Automation (ICCUBEA), 2015 International Conference on, vol., no., pp. 205–208, 26–27 Feb. 2015. doi:10.1109/ICCUBEA.2015.45

Abstract: Fingerprint authentication is one of the most reliable and widely used personal identification method. However, manual fingerprint authentication is tedious, inaccurate, time-consuming and costly that it is not capable of meeting today’s increasing performance necessities. An automatic fingerprint authentication system (AFAS) is widely needed. It plays a very essential role in forensic and civilian applications such as criminal identification, access control, and ATM card verification. This paper describes the design and implementation of an Embedded Fingerprint Authentication system which operates in two stages: minutia extraction and minutia matching. The present technological era is demanding reliable and cost-effective personal authentication systems for large number of daily use applications where security and privacy performance of the information is required. Biometrics authentication techniques in combination with embedded systems technologies give a demanding solution to this need. This paper explains the hardware-software co-design responsible for matching two fingerprint minutiae sets and suggests the use of reconfigurable architectures for Automatic Fingerprint Authentication System. Moreover, this paper explains the implementation of a fingerprint algorithm using a Spartan-6 FPGA, as an appropriate portable and low cost device. The experimental results show that system meets the response time requirements of Automatic Fingerprint Authentication System with high speed using hardware-software co-design.

Keywords: data privacy; digital forensics; embedded systems; field programmable gate arrays; hardware-software codesign; message authentication; AFAS; ATM card verification; Spartan-6 FPGA; access control; and applications; automatic fingerprint authentication system; biometrics authentication techniques; criminal identification; daily use applications; embedded system; field programmable gate array; fingerprint minutiae sets; forensic applications; hardware-software codesign; manual fingerprint authentication; minutia extraction; minutia matching; personal identification method; privacy performance; reconfigurable architectures; response time requirements; security performance; Authentication; Coprocessors; Databases; Field programmable gate arrays; Fingerprint recognition; Hardware; Portable computers; Biometrics; Embedded system; Reconfigurable; fingerprint; matching; minutia (ID#: 15-7504)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7155835&isnumber=7155781

Jaiswal, A.S.; Baporikar, V., “Embedded Wireless Data Acquisition System for Unmanned Vehicle in Underwater Environment,” in Underwater Technology (UT), 2015 IEEE, vol., no., pp. 1–6, 23–25 Feb. 2015. doi:10.1109/UT.2015.7108223

Abstract: Underwater robots can record data that is difficult for humans to gather. In recent years, robotic underwater vehicles have become useful for variety of industrial and civil sectors in exploring the water bodies. They are used extensively by the scientific community to study the ocean, fresh water & underwater environment. ZigBee is an efficient & effective wireless network standard for wireless control and monitoring applications. It is an alternate technology that has changed connectivity between the communicating systems. The objective of this model is to design a wireless underwater robot for security purpose and better understand water and its environment with electronics, motion control and sensor system. This paper will present an implemented model of Embedded Wireless Data Acquisition system using ZigBee which will be controlled using the PIC microcontroller which will be programmed using embedded C language. The wireless rotating camera will capture the images & video. Sonar, depth, temperature sensors will acquire data and transmit to the user computer using Zigbee. The DC motor is used for the movement of the robot & controlled wirelessly by user. In our implementation the PIC acts as the Central Data Acquisition System which is controlling system and acquires the data from different subsystems of an unmanned underwater vehicle. This new method of implementation of ZigBee as a medium for data acquisition system will be useful for cleaning, monitoring, understanding the clean and unclean underwater environment.

Keywords: Zigbee; data acquisition; geophysical equipment; geophysical techniques; remotely operated vehicles; wireless sensor networks; Central Data Acquisition System; PIC microcontroller; Zigbee data acquisition; civil sectors; clean underwater environment; communicating systems; depth sensor; embedded C language; embedded wireless data acquisition system; fresh water; industrial sectors; motion control; record data; robotic underwater vehicles; scientific community; sensor system; sonar sensor; temperature sensor; underwater environment; underwater robots; unmanned underwater vehicle; water bodies; wireless control application; wireless monitoring application; wireless network standard; wireless rotating camera; wireless underwater robot; Acoustics; Communication system security; DC motors; Monitoring; Process control; Rivers; Wireless communication; Embedded system PIC; Zigbee data acquisition; ZigBee; wireless network (ID#: 15-7505)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7108223&isnumber=7108213

Khandal, D.; Somwanshi, D., “A Novel Cost Effective Access Control and Auto Filling Form System Using QR Code,” in Advances in Computing, Communications and Informatics (ICACCI), 2015 International Conference on, vol., no., pp. 1–5, 10–13 Aug. 2015. doi:10.1109/ICACCI.2015.7275575

Abstract: QR codes are used to store information in two dimensional grids which can be decoded quickly. The proposed work here deals with Quick response (QR) code extending its encoding and decoding implementation to design a new articulated user authentication and access control mechanism. The work also proposes a new simultaneous registration system for offices and organizations. The proposed system retrieves the candidate’s information from their QR identification code and transfers the data to the digital application form, along with granting authentication to authorized QR image from the database. The system can improve the quality of service and thus it can increase the productivity of any organization.

Keywords: QR codes; authorisation; cryptography; decoding; image coding; information retrieval; information storage; quality of service; QR identification code; articulated user authentication design; authorized QR image; auto filling form system; candidate information retrieval; cost effective access control system; data transfer; decoding implementation; digital application form; encoding implementation; information storage; offices; organizations; quality of service improvement; quick response code; registration system; two-dimensional grid; Decoding; Handwriting recognition; IEC; ISO; Image recognition; Magnetic resonance imaging; Monitoring; Authentication; Automated filling form; Code Reader; Embedded system; Encoding-Decoding; Proteus; Security

(ID#: 15-7506)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7275575&isnumber=7275573

Strobel, D.; Bache, F.; Oswald, D.; Schellenberg, F.; Paar, C., “SCANDALee: A Side-ChANnel-based DisAssembLer Using Local Electromagnetic Emanations,” in Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015, vol., no., pp. 139–144, 9–13 March 2015. doi: (not provided)

Abstract: Side-channel analysis has become a well-established topic in the scientific community and industry over the last one and a half decade. Somewhat surprisingly, the vast majority of work on side-channel analysis has been restricted to the “use case” of attacking cryptographic implementations through the recovery of keys. In this contribution, we show how side-channel analysis can be used for extracting code from embedded systems based on a CPU’s electromagnetic emanation. There are many applications within and outside the security community where this is desirable. In cryptography, it can, e.g., be used for recovering proprietary ciphers and security protocols. Another broad application field is general security and reverse engineering, e.g., for detecting IP violations of firmware or for debugging embedded systems when there is no debug interface or it is proprietary. A core feature of our approach is that we take localized electromagnetic measurements that are spatially distributed over the IC being analyzed. Given these multiple inputs, we model code extraction as a classification problem that we solve with supervised learning algorithms. We apply a variant of linear discriminant analysis to distinguish between the multiple classes. In contrast to previous approaches, which reported instruction recognition rates between 40-70%, our approach detects more than 95% of all instructions for test code, and close to 90% for real-world code. The methods are thus very relevant for use in practice. Our method performs dynamic code recognition, which has both advantages (only the program parts that are actually executed are observed) but also limitations (rare code executions are difficult to observe).

Keywords: cryptographic protocols; firmware; learning (artificial intelligence); program debugging; reverse engineering; SCANDALee; classification problem; cryptography; dynamic code recognition; embedded system debugging; firmware IP violation detection; general security; linear discriminant analysis; local electromagnetic emanations; localized electromagnetic measurements; proprietary ciphers; security protocols; side-channel analysis; side-channel-based disassembler; supervised learning algorithm; Algorithm design and analysis; Clocks; Feature extraction; Position measurement; Probes; Reverse engineering; Security (ID#: 15-7507)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7092372&isnumber=7092347

Rivière, L.; Bringer, J.; Thanh-Ha Le; Chabanne, H., “A Novel Simulation Approach for Fault Injection Resistance Evaluation on Smart Cards,” in Software Testing, Verification and Validation Workshops (ICSTW), 2015 IEEE Eighth International Conference on, vol., no., pp. 1–8, 13–17 April 2015. doi:10.1109/ICSTW.2015.7107460

Abstract: Physical perturbations are performed against embedded systems that can contain valuable data. Such devices and in particular smart cards are targeted because potential attackers hold them. The embedded system security must hold against intentional hardware failures that can result in software errors. In a malicious purpose, an attacker could exploit such errors to find out secret data or disrupt a transaction. Simulation techniques help to point out fault injection vulnerabilities and come at an early stage in the development process. This paper proposes a generic fault injection simulation tool that has the particularity to embed the injection mechanism into the smart card source code. By its embedded nature, the Embedded Fault Simulator (EFS) allows us to perform fault injection simulations and side-channel analyses simultaneously. It makes it possible to achieve combined attacks, multiple fault attacks and to perform backward analyses. We appraise our approach on real, modern and complex smart card systems under data and control flow fault models. We illustrate the EFS capacities by performing a practical combined attack on an Advanced Encryption Standard (AES) implementation.

Keywords: cryptography; fault simulation; smart cards; AES; EFS; advanced encryption standard; backward analyses; complex smart card systems; control flow fault models; embedded fault simulator; fault injection resistance evaluation; fault injection simulations; generic fault injection simulation tool; multiple fault attacks; side-channel analyses; smart card source code; Data models; Hardware; Object oriented modeling; Registers; Security; Smart cards; Software; Fault injection; Physical attack; combined attack; data modification; embedded systems; instruction skip; side-channel attack; smart card (ID#: 15-7508)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7107460&isnumber=7107396

Ambrose, J.A.; Ragel, R.G.; Jayasinghe, D.; Tuo Li; Parameswaran, S., “Side Channel Attacks in Embedded Systems: A Tale of Hostilities and Deterrence,” in Quality Electronic Design (ISQED), 2015 16th International Symposium on, vol., no.,

pp. 452–459, 2–4 March 2015. doi:10.1109/ISQED.2015.7085468

Abstract: Security of embedded computing systems is becoming paramount as these devices become more ubiquitous, contain personal information and are increasingly used for financial transactions. Side Channel Attacks, in particular, have been effective in obtaining secret keys which protect information. In this paper we selectively classify the side channel attacks, and selectively demonstrate a few attacks. We further classify the popular countermeasures to Side Channel Attacks. The paper paints an overall picture for a researcher or a practitioner who seeks to understand or begin to work in the area of side channel attacks in embedded systems.

Keywords: embedded systems; security of data; embedded computing system; embedded system; financial transaction; personal information; security; side channel attack; Algorithm design and analysis; Correlation; Embedded systems; Encryption; Power demand; Timing (ID#: 15-7509)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7085468&isnumber=7085355

Ghosh, S.; Das, S.J.; Paul, R.; Chakrabarti, A., “Multicore Encryption and Authentication on a Reconfigurable Hardware,” in Recent Trends in Information Systems (ReTIS), 2015 IEEE 2nd International Conference on, vol., no., pp. 173–177, 9–11 July 2015. doi:10.1109/ReTIS.2015.7232873

Abstract: Security has always been the toughest challenge in data communication, at the same time it is the biggest necessity in transmitting confidential data. Sensitive data are often at stake when they are deployed in a network. Embedded system design is a very popular research activity as it has a wide range of applications namely, security and surveillance, personal digital assistant, biomedical systems, mobile and pervasive communication gadgets, along with its huge speed compared to very popular software designs. Most of the embedded system applications involve data communication between multiple parties. To add to it, sensor technology requires physically secured systems, which can be dealt with cryptographic and hashing algorithms. However, a parallel implementation of Encryption and Hashing algorithm will cost the efficiency and performance speed of the system. To overcome the shortcomings a multi-core system, capable of parallely executing authentication and encryption is proposed. In this proposal a encryption algorithm and a hash algorithm are placed into two ARM cortex processor of ZYNQ 7020-clg484 FPGA board using ISE 14.4 design suite. The true parallel execution of both algorithms increases system throughput. The soft core IPs(RS232 and Ethernet) are placed in FPGA region to handle realtime data.

Keywords: cryptography; data communication; data privacy; field programmable gate arrays; message authentication; parallel processing; ARM cortex processor; Ethernet; ISE 14.4 design suite; RS232; ZYNQ 7020-clg484 FPGA board; confidential data transmission; cryptographic algorithm; embedded system applications; embedded system design; hashing algorithm; multicore authentication; multicore encryption; parallel implementation; physically secured systems; reconfigurable hardware; security; sensor technology; soft core IPs; Algorithm design and analysis; Authentication; Encryption; Field programmable gate arrays; Hardware; Throughput (ID#: 15-7510)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7232873&isnumber=7232836

Davi, L.; Hanreich, M.; Paul, D.; Sadeghi, A.-R.; Koeberl, P.; Sullivan, D.; Arias, O.; Jin, Y., “HAFIX: Hardware-Assisted Flow Integrity eXtension,” in Design Automation Conference (DAC), 2015 52nd ACM/EDAC/IEEE, vol., no., pp. 1–6, 8–12 June 2015. doi:10.1145/2744769.2744847

Abstract: Code-reuse attacks like return-oriented programming (ROP) pose a severe threat to modern software on diverse processor architectures. Designing practical and secure defenses against code-reuse attacks is highly challenging and currently subject to intense research. However, no secure and practical system-level solutions exist so far, since a large number of proposed defenses have been successfully bypassed. To tackle this attack, we present HAFIX (Hardware-Assisted Flow Integrity Extension), a defense against code-reuse attacks exploiting backward edges (returns). HAFIX provides fine-grained and practical protection, and serves as an enabling technology for future control-flow integrity instantiations. This paper presents the implementation and evaluation of HAFIX for the Intel^® Siskiyou Peak and SPARC embedded system architectures, and demonstrates its security and efficiency in code-reuse protection while incurring only 2% performance overhead.

Keywords: data protection; software reusability; HAFIX; Intel Siskiyou Peak; ROP; SPARC embedded system architectures; backward edges; code-reuse attacks; code-reuse protection; control-flow integrity instantiations; hardware-assisted flow integrity extension; processor architectures; return-oriented programming; Benchmark testing; Computer architecture; Hardware; Pipelines; Program processors; Random access memory; Registers (ID#: 15-7511)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7167258&isnumber=7167177

Sixing Lu; Minjun Seo; Lysecky, R., “Timing-Based Anomaly Detection in Embedded Systems,” in Design Automation Conference (ASP-DAC), 2015 20th Asia and South Pacific, vol., no., pp. 809–814, 19–22 Jan. 2015. doi:10.1109/ASPDAC.2015.7059110

Abstract: Recent research has demonstrated that many systems are vulnerable to numerous types of malicious activity. As the pervasiveness of embedded systems with network connectivity continues to increase, embedded systems security has become a critical challenge. However, most existing techniques for detecting malware utilize software-based methods that incur significant performance overheads that are often not feasible in embedded systems. In this paper, we present an overview of a novel method for non-intrusively detecting malware in embedded system. The proposed technique utilizes timing requirements to improve detection performance and provide increased resilience to mimicry attacks.

Keywords: embedded systems; invasive software; object detection; timing circuits; detection performance improvement; embedded system security; malicious activity; mimicry attacks; network connectivity; nonintrusively detecting malware; performance overheads; software-based methods; timing-based anomaly detection; Embedded systems; Hardware; Malware; Monitoring; Runtime; Timing (ID#: 15-7512)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7059110&isnumber=7058915

Lu, Zhaojun; Pei, Gen; Liu, Bojun; Liu, Zhenglin, “Hardware Implementation of Negative Selection Algorithm for Malware Detection,” in Electron Devices and Solid-State Circuits (EDSSC), 2015 IEEE International Conference on, vol., no., pp. 301–304, 1–4 June 2015. doi:10.1109/EDSSC.2015.7285110

Abstract: It has been an important issue needing solved in the information security field to detect malware[4][5]. Negative selection algorithm as one of the core algorithm of artificial immune system, can be applied to detect malware. Negative selection algorithm based on binary coding is one of the most basic and important detecting model. But the application of negative selection algorithm mainly exist in the software and network systems, there is not a ready-made approach to apply negative selection algorithm to detect malicious attacks for embedded system at present. This paper focuses in proposing an approach to add a hardware immune mechanism to the embedded processor to defense malicious attacks and improving the traditional negative selection algorithm so that we can actually apply the algorithm in malware detection for embedded system in further work.

Keywords: Conferences; Electron devices; Solid state circuits; AIS; Detection; Hardware Immune Mechanism; Malware; NSA

(ID#: 15-7513)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7285110&isnumber=7285012

Sujitha, R.; Devipriya, A., “Automatic Identification of Accidents and to Improve Notification Using Emerging Technologies,” in Soft-Computing and Networks Security (ICSNS), 2015 International Conference on, vol., no., pp. 1–4, 25–27 Feb. 2015. doi:10.1109/ICSNS.2015.7292412

Abstract: New communication technologies integrated into modern vehicles offer a better assistance to people injured in traffic accidents. Recent studies show how hybrid communication capabilities should be supported and improve overall rescue process. There are a variety of areas, where in a need exists for a system capable of identifying and characterize the severity of the accidents using KDD process. In this system considers the most relevant variables that can be characterize the severity of the accidents (variables such as vehicle speed, vehicle location, accelerometer condition) by using embedded systems. This system consists of several wireless network devices such as Global Positioning System (GPS) and ZigBee. GPS determine the location of the vehicle. Proposed system contains single-board embedded system that is equipped with GPS and ZigBee, along with microcontroller that is installed in the OBU vehicle. Based on vehicle motion, report is generated and to be taken by emergency services. If small accident has occurred or if there is no serious danger to anyone’s life, then there is the option for alert message can be terminated by the driver or any other near peoples by a switch in order to avoid sends the message to control and save the valuable time of the medical rescue team. To improve the overall rescue process, a fast and accurate estimation of the severity of the accident system offered perfect facts to emergency services as soon as possible and saves precious life of peoples.

Keywords: Accelerometers; Accidents; Databases; Emergency services; Global Positioning System; Servers; Vehicles; GPS; OBU; VANET; ZigBee (ID#: 15-7514)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7292412&isnumber=7292366

Balasundaram, Anuradha; Chenniappan, Vivekanandan, “Optimal Code Layout for Reducing Energy Consumption in Embedded Systems,” in Soft-Computing and Networks Security (ICSNS), 2015 International Conference on, vol., no., pp. 1–5,

25–27 Feb. 2015. doi:10.1109/ICSNS.2015.7292406

Abstract: Most of the microprocessor spends majority of its time waiting for the data to be transferred from slow memory devices connected to it, resulting in Memory wall problem. The main aim of this paper is to reduce memory wall problem by increasing not only processor speed but also the memory speed. This can be achieved by placing efficient and small memory near the processor so that energy efficiency of the system can be improved. Such memory is called Scratch Pad memory (SPM). Scratch pad memory (SPM) and cache memory plays a vital role in improving the efficiency of the system. Repositioning of code in on-chip and off-chip memory increases the efficient of the utilization of multiprocessing embedded system. Optimal code layout design is developed to place the code in memory for preventing the cache conflicts and misses. Many researchers discussed about the usage of SPM and cache memory to improve the efficiency of the system but combining the both is not done. In this work both SPM and cache memory is combined with the proposed Meta heuristics technique. Meta heuristic model is the proposed model in which along with the SPM, Cache code layout is developed to place the code in it, resulting better performance compared with the other two models namely ILP model and Heuristic model. It is found that the two stage meta-heuristic model yield more efficiency and consume less energy than other two models.

Keywords: Cache memory; Embedded systems; Energy consumption; Layout; Memory management; Random access memory; System-on-chip; Heuristic; ILP; Memory wall problem; Meta heuristics; Scratch Pad Memory (ID#: 15-7515)

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7292406&isnumber=7292366

 

Note:

Articles listed on these pages have been found on publicly available internet pages and are cited with links to those pages. Some of the information included herein has been reprinted with permission from the authors or data repositories. Direct any requests via Email to news@scienceofsecurity.net for removal of the links or modifications to specific citations. Please include the ID# of the specific citation in your correspondence.