 |
Tamper Resistance 2015 |
Tamper resistance is an important element for composability of software systems and for security of cyber physical system resilience. The research articles cited here were presented in 2015.
Joseph Gan; Roddy Kok; Pankaj Kohli; Yun Ding; Benjamin Mah, “Using Virtual Machine Protections to Enhance Whitebox Cryptography,” in Software Protection (SPRO), 2015 IEEE/ACM 1st International Workshop on, vol., no., pp. 17–23, 19–19 May 2015. doi:10.1109/SPRO.2015.12
Abstract: Since attackers can gain full control of the mobile execution environment, they are able to examine the inputs, outputs, and, with the help of a disassembler/debugger the result of every intermediate computation a cryptographic algorithm carries out. Essentially, attackers have total visibility into the cryptographic operation. Whitebox cryptography aims at protecting keys from disclosed in software implementation. With theoretically unbounded resources a determined attacker is able to recover any confidential keys and data. A strong whitebox cipher implementation as the cornerstone of security is essential for the overall security in mobile environments. Our goal is to provide an increased degree of protection given the constraints of a software solution and the resource constrained, hostile-host environments. We seek neither perfect protection nor long-term guarantees, but rather a practical level of protection to balance cost, security and usability. Regular software updates can be applied such that the protection will need to withstand a limited period of time. V-OS operates as a virtual machine (VM) within the native mobile operating system to provide a secure software environment within which to perform critical processes and computations for a mobile app.
Keywords: cryptography; mobile computing; virtual machines; V-OS; confidential keys; cryptographic algorithm; mobile application; mobile execution environment; secure software environment; software implementation; virtual machine protection; whitebox cipher implementation; whitebox cryptography; Androids; Encryption; Microprogramming; Mobile communication; Object recognition; Virtual machining; Anti-Debugging; Anti-Reverse Engineering; Code Obfuscation; Data Obfuscation; Fingerprinting; Mobile Code; Software Licensing; Software Renewability; Software Tamper Resistance; Virtual Machine Protections (VMP); Whitebox Cryptography (WBC) (ID#: 15- )
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7174806&isnumber=7174794
Junod, P.; Rinaldini, J.; Wehrli, J.; Michielin, J., “Obfuscator-LLVM — Software Protection for the Masses,” in Software Protection (SPRO), 2015 IEEE/ACM 1st International Workshop on, vol., no., pp. 3–9, 19–19 May 2015. doi:10.1109/SPRO.2015.10
Abstract: Software security with respect to reverse-engineering is a challenging discipline that has been researched for several years and which is still active. At the same time, this field is inherently practical, and thus of industrial relevance: indeed, protecting a piece of software against tampering, malicious modifications or reverse-engineering is a very difficult task. In this paper, we present and discuss a software obfuscation prototype tool based on the LLVM compilation suite. Our tool is built as different passes, where some of them have been open-sourced and are freely available, that work on the LLVM Intermediate Representation (IR) code. This approach brings several advantages, including the fact that it is language-agnostic and mostly independent of the target architecture. Our current prototype supports basic instruction substitutions, insertion of bogus control-flow constructs mixed with opaque predicates, control-flow flattening, procedures merging as well as a code tamper-proofing algorithm embedding code and data checksums directly in the control-flow flattening mechanism.
Keywords: reverse engineering; security of data; LLVM compilation suite; LLVM intermediate representation code; code tamper-proofing algorithm embedding code; control-flow flattening mechanism; obfuscator-LLVM; reverse-engineering; software obfuscation prototype tool; software protection; software security; Cryptography; Merging; Resistance; Routing; Software; Software algorithms (ID#: 15-7736)
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7174804&isnumber=7174794
Nozaki, Y.; Asahi, K.; Yoshikawa, M., “Countermeasure of TWINE Against Power Analysis Attack,” in Future of Electron Devices, Kansai (IMFEDK), 2015 IEEE International Meeting for, vol., no., pp. 68–69, 4–5 June 2015. doi:10.1109/IMFEDK.2015.7158553
Abstract: Lightweight block ciphers, which can be embedded using small area, have attracted much attention. This study proposes a new countermeasure for TWINE which is one of the most popular light weight block ciphers. The proposed method masks the correlation between power consumption and confidential information by adding random numbers to intermediate data of encryption. Experiments prove effective tamper-resistance of the proposed method.
Keywords: cryptography; random number generation; TWINE; confidential information; encryption; lightweight block cipher; power analysis attack; power consumption; random number; tamper-resistance; Ciphers; Correlation; Encryption; Hamming distance; Power demand; Registers; lightweight block cipher; power analysis of semiconductor; security of semiconductor; tamper resistance (ID#: 15-7737)
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7158553&isnumber=7158481
Yoshikawa, M.; Tsukadaira, T.; Kumaki, T., “Design and LSI Prototyping of Security Module with Hardware Trojan,” in Consumer Electronics (ICCE), 2015 IEEE International Conference on, vol., no., pp. 426–427, 9–12 Jan. 2015. doi:10.1109/ICCE.2015.7066472
Abstract: To examine the tamper resistance of consumer security products using cryptographic circuits, the present study develops countermeasure-annulled hardware Trojan and manufactures its prototyping as ASIC using 018 μm CMOS. The present study also verifies the validity and effect of the hardware Trojan on the prototyping LSI by performing evaluation tests.
Keywords: CMOS integrated circuits; application specific integrated circuits; consumer products; cryptography; integrated circuit manufacture; large scale integration; rapid prototyping (industrial); ASIC; CMOS technology; LSI prototyping; Trojan; consumer security product; countermeasure-annulled hardware; cryptographic circuit; security module; size 0.18 μm; tamper resistance; Circuit faults; Conferences; Encryption; Hardware; Large scale integration; Trojan horses (ID#: 15-7738)
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7066472&isnumber=7066289
Nozaki, Y.; Asai, T.; Asahi, K.; Yoshikawa, M., “Power Analysis for Clock Fluctuation LSI,” in Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing (SNPD), 2015 16th IEEE/ACIS International Conference on, vol., no., pp. 1–4, 1–3 June 2015. doi:10.1109/SNPD.2015.7176195
Abstract: Several measures against power analysis attacks have been proposed. A clock fluctuation LSI, which achieves tamper resistance against electromagnetic analysis attacks, is one of popular measures. The present study proposes an alignment method which can analyze the clock fluctuation LSI. The proposed method corrects a shift of power consumption waveforms in the time axis direction caused by periodic fluctuation of clocks. Evaluation experiments using an actual device prove the validity of the proposed method.
Keywords: cryptography; standards; AES; advanced encryption standard; clock fluctuation LSI; electromagnetic analysis attacks; power consumption waveforms; tamper resistance; Clocks; Delays; Encryption; Fluctuations; Large scale integration; Power demand; clock fluctuation; power analysis; security (ID#: 15-7739)
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7176195&isnumber=7176160
Shiozaki, M.; Kubota, T.; Nakai, T.; Takeuchi, A.; Nishimura, T.; Fujino, T., “Tamper-Resistant Authentication System with Side-Channel Attack Resistant AES and PUF Using MDR-ROM,” in Circuits and Systems (ISCAS), 2015 IEEE International Symposium on, vol., no., pp. 1462–1465, 24–27 May 2015. doi:10.1109/ISCAS.2015.7168920
Abstract: As a threat of security devices, side-channel attacks (SCAs) and invasive attacks have been identified in the last decade. The SCA reveals a secret key on a cryptographic circuit by measuring power consumption or electromagnetic radiation during the cryptographic operations. We have proposed the MDR-ROM scheme as the low-power and small-area counter-measure against SCAs. Meanwhile, secret data in a nonvolatile memory is analyzed by invasive attacks, and the cryptographic device is counterfeited and cloned by an adversary. We proposed to combine the MDR-ROM scheme with the Physical Unclonable Function (PUF) technique, which is expected as the counter-measure against the counterfeit, and the prototype chip was fabricated with a 180nm CMOS technology. In addition, the keyless entry demonstration system was produced in order to present the effectiveness of SCA resistance and PUF technique. Our experiments confirmed that this demonstration system achieved sufficient tamper resistance.
Keywords: CMOS integrated circuits; cryptography; random-access storage; read-only storage;180nm CMOS technology; AES; MDR-ROM scheme; PUF; SCA; cryptographic circuit; cryptographic operations; electromagnetic radiation measurement; invasive attacks; low-power counter-measure; nonvolatile memory; physical unclonable function technique; power consumption measurement; secret key; security devices; side-channel attack resistant; small-area counter-measure; tamper-resistant authentication system; Authentication; Correlation; Cryptography; Large scale integration; Power measurement; Read only memory; Resistance; IO-masked dual-rail ROM (MDR-ROM); Side channel attacks (SCA); physical unclonable function (PUF) (ID#: 15-7740)
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7168920&isnumber=7168553
Wang, X.; Karri, R., “Reusing Hardware Performance Counters to Detect and Identify Kernel Control-Flow Modifying Rootkits,” in Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 35, no. 3, pp. 485– 498, March 2016. doi:10.1109/TCAD.2015.2474374
Abstract: Kernel rootkits are formidable threats to computer systems. They are stealthy and can have unrestricted access to system resources. This paper presents NumChecker, a new Virtual Machine Monitor (VMM) based framework to detect and identify control-flow modifying kernel rootkits in a guest Virtual Machine (VM). NumChecker detects and identifies malicious modifications to a system call in the guest VM by measuring the number of certain hardware events that occur during the system call’s execution. To automatically count these events, NumChecker leverages the Hardware Performance Counters (HPCs), which exist in modern processors. By using HPCs, the checking cost is significantly reduced and the tamper-resistance is enhanced. We implement a prototype of NumChecker on Linux with the Kernel-based Virtual Machine (KVM). An HPC-based two-phase kernel rootkit detection and identification technique is presented and evaluated on a number of real-world kernel rootkits. The results demonstrate its practicality and effectiveness.
Keywords: Hardware; Kernel; Linux; Monitoring; Radiation detectors; Virtual machining; Virtualization; Controlflow Modifying Kernel Rootkits; Hardware Performance Counters; Rootkit Detection and Identification (ID#: 15-7741)
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7229276&isnumber=6917053
Yu-Shen Ho; Ruay-Lien Ma; Cheng-En Sung; I-Chen Tsai; Li-Wei Kang; Chia-Mu Yu, “Deterministic Detection of Node Replication Attacks in Sensor Networks,” in Consumer Electronics - Taiwan (ICCE-TW), 2015 IEEE International Conference on, vol., no., pp. 468–469, 6–8 June 2015. doi:10.1109/ICCE-TW.2015.7217002
Abstract: In Wireless Sensor Networks (WSNs), because sensor nodes do not equip with tamper resistance hardwares, they are vulnerable to the capture and compromise performed by the adversary. By launching the node replication attack, the adversary can place the replicas of captured sensor nodes back into the sensor networks so as to eavesdrop the transmitted messages or compromise the functionality of the network. Although several protocols are proposed to defend against node replication attacks, all the proposed methods can only detect the node replication attacks probabilistically. In this paper, we propose Quorum-Based Multicast (QBM) and Star-shape Line-Selected Multicast (SLSM) to detect the node replication attacks, both of which can deterministically detect the replicas.
Keywords: multicast communication; telecommunication security; wireless sensor networks; deterministic detection; node replication attacks; quorum-based multicast; star-shape line-selected multicast; Cloning; Hardware; Mobile communication; Probabilistic logic; Protocols; Security; Wireless sensor networks (ID#: 15-7742)
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7217002&isnumber=7216784
Oliveira, L.C.; Pereira, E.G.; Oliveira, R.C.; Morais, M.R.A.; Lima, A.M.N.; Neff, H., “SPR Sensor for Tampering Detection in Biofuels,” in Instrumentation and Measurement Technology Conference (I2MTC), 2015 IEEE International, vol., no.,
pp. 1471–1476, 11–14 May 2015. doi:10.1109/I2MTC.2015.7151494
Abstract: This work presents a sensor based on surface plasmon resonance phenomenon and combined with dc-sheet resistance monitoring for detecting tampering of ethanol fuel. To demonstrated the feasibility of the proposed sensor, hydrated and anhydride ethanol fuel were tested. Tampering ethanol with methanol and with increasing water content have been used to evaluate the capabilities of the proposed sensing arrangement.
Keywords: biofuel; chemical sensors; surface plasmon resonance; anhydride ethanol fuel; biofuels; dc-sheet resistance monitoring; ethanol fuel; hydrated ethanol fuel; sensing arrangement; surface plasmon resonance phenomenon; tampering detection; water content; Ethanol; Fuels; Metals; Optical refraction; Optical sensors; Optical surface waves; Refractive index (ID#: 15-7743)
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7151494&isnumber=7151225
Dhole, V.S.; Patil, N.N., “Self Embedding Fragile Watermarking for Image Tampering Detection and Image Recovery Using Self Recovery Blocks,” in Computing Communication Control and Automation (ICCUBEA), 2015 International Conference on, vol., no., pp. 752–757, 26–27 Feb. 2015. doi:10.1109/ICCUBEA.2015.150
Abstract: Fragile watermarking is discovered for authentication and content integrity verification. This paper introduces a modified fragile watermarking technique for image recovery. Here we can detect as well as recovered the tampered image with its tampered region. This modified approach helps us to produce resistance on various attacks like birthday attack, college attack and quantization attacks. Using a non-sequential block chaining and randomized block chaining, which is created on the basis of secrete key this modified technique produces great amount of recovery from tampered regions. In this modified technique we put a watermark information and information of recovery of image block into the image block. These blocks are linked with next randomly generated block of image. In this modified process of block chaining to obtained first watermark image, modified technique uses original image and watermarked image. While to obtained self-embedded image we merge shuffled original image on original image so that we get final shuffled image. At last we merge first watermark image with shuffled image to produce final watermarked image. During recovery we follow reverse process of above to obtained original image from tampered image. By comparing block by block mean values of tampered blocks recovery of tampered blocks can be done. This modified technique can be used for color as well as gray scale images. The implementation shows that, the proposed modified technique can be used with promising result as an alternative approach to image recovery from tampered area effectively.
Keywords: image colour analysis; image watermarking; object detection; authentication; birthday attack; college attack; color image; content integrity verification; gray scale image; image recovery; image tampering detection; quantization attack; self-embedded image; self-embedding fragile watermarking; self-recovery image blocks; Authentication; Digital images; Discrete cosine transforms; Indexes; Robustness; Sequential analysis; Watermarking; Self embedding; block-chaining; image recovery; shuffled; tamper detection (ID#: 15-7744)
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7155948&isnumber=7155781
Rajendran, J.; Karri, R.; Wendt, J.B.; Potkonjak, M.; McDonald, N.; Rose, G.S.; Wysocki, B., “Nano Meets Security: Exploring Nanoelectronic Devices for Security Applications,” in Proceedings of the IEEE, vol. 103, no. 5, pp. 829–849, May 2015. doi:10.1109/JPROC.2014.2387353
Abstract: Information security has emerged as an important system and application metric. Classical security solutions use algorithmic mechanisms that address a small subset of emerging security requirements, often at high-energy and performance overhead. Further, emerging side-channel and physical attacks can compromise classical security solutions. Hardware security solutions overcome many of these limitations with less energy and performance overhead. Nanoelectronics-based hardware security preserves these advantages while enabling conceptually new security primitives and applications. This tutorial paper shows how one can develop hardware security primitives by exploiting the unique characteristics such as complex device and system models, bidirectional operation, and nonvolatility of emerging nanoelectronic devices. This paper then explains the security capabilities of several emerging nanoelectronic devices: memristors, resistive random-access memory, contact-resistive random-access memory, phase change memories, spin torque-transfer random-access memory, orthogonal spin transfer random access memory, graphene, carbon nanotubes, silicon nanowire field-effect transistors, and nanoelectronic mechanical switches. Further, the paper describes hardware security primitives for authentication, key generation, data encryption, device identification, digital forensics, tamper detection, and thwarting reverse engineering. Finally, the paper summarizes the outstanding challenges in using emerging nanoelectronic devices for security.
Keywords: carbon nanotubes; cryptography; digital forensics; elemental semiconductors; field effect transistors; graphene devices; microswitches; nanoelectronics; nanowires; phase change memories; resistive RAM; silicon; C; Si; algorithmic mechanisms; authentication; bidirectional operation; classical security solutions; complex device; contact resistive random access memory; data encryption; device identification; graphene; hardware security primitives; information security; key generation; memristors; nanoelectronic devices; nanoelectronic mechanical switches; orthogonal spin transfer random access memory; physical attacks; security requirements; side channel; silicon nanowire field effect transistors; spin torque-transfer random-access memory; tamper detection; thwarting reverse engineering; CMOS integrated circuits; Digital forensics; Memristors; Nanoelectronics; Nanoscale devices; Network security; Phase change materials; Random access memory; Resistance; Emerging technologies; PCMs; hardware security; physical unclonable functions (ID#: 15-7745)
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7106562&isnumber=7112213
Mercier, H.; Augier, M.; Lenstra, A.K., “STEP-Archival: Storage Integrity and Anti-Tampering Using Data Entanglement,” in Information Theory (ISIT), 2015 IEEE International Symposium on, vol., no., pp. 1590–1594, 14–19 June 2015. doi:10.1109/ISIT.2015.7282724
Abstract: We present STEP-archives, a model for censorship-resistant storage systems where an attacker cannot censor or tamper with data without causing a large amount of obvious collateral damage. MDS erasure codes are used to entangle unrelated data blocks, in addition to providing redundancy against storage failures. We show a tradeoff for the attacker between attack complexity, irrecoverability, and collateral damage. We also show that the system can efficiently recover from attacks with imperfect irrecoverability, making the problem asymmetric between attackers and defenders. Finally, we present sample heuristic attack algorithms that are efficient and irrecoverable (but not collateral-damage-optimal), and demonstrate how some strategies and parameter choices allow to resist these sample attacks.
Keywords: data integrity; data protection; information retrieval; redundancy; STEP-archival; antitampering; censorship-resistant storage system; data entanglement; heuristic attack algorithm; imperfect irrecoverability; storage integrity; Censorship; Complexity theory; Decoding; Grippers; Memory; Resistance; Security; Distributed storage; MDS codes; anti-tampering (ID#: 15-7746)
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7282724&isnumber=7282397
Note:
Articles listed on these pages have been found on publicly available internet pages and are cited with links to those pages. Some of the information included herein has been reprinted with permission from the authors or data repositories. Direct any requests via Email to news@scienceofsecurity.net for removal of the links or modifications to specific citations. Please include the ID# of the specific citation in your correspondence.