Cyber-Physical Systems (CPS)—cars, airplanes, power plants, and etc.—are increasingly dependent on powerful and complex hardware for higher intelligence and functionalities. However, this complex hardware may also introduce new attack vectors—hardware side-channels—which can be exploited by attackers to steal sensitive information, to disrupt timing of time critical functions that interact with the physical plants, or to break memory protection mechanisms in modern computers. Because these attacks target hardware, even logically safe and secure software such as a formally verified OS, could still be vulnerable. Given the safety-critical nature of CPS, hardware side-channels should be thoroughly analyzed and prevented in CPS. This project focuses on micro-architectural side channels in embedded multicore computing hardware and aims to develop fundamental OS and architecture designs that minimize or completely eliminate the possibility of potential hardware-level side-channel attacks. Successful completion of this project will result in:

Empirical studies on micro-architectural side-channels in safety-critical CPS.
Criticality-aware OS and architecture prototypes for side-channel attack resistant CPS.