We present a CMOS-compatible Electrical Non-Persistence Primitive (ENP-P) that enforces a strict hardwarelevel rule for ephemeral secrets in the modeled digital design: a read returns the true secret or an inert logical output-nothing in between at the interface. Each ENP-P cell stores an encoded value under basis b; a read with supplied basis b ′ performs a hardware comparison. A matching basis reveals the secret exactly once, while a mismatching basis immediately yields an inert, groundreferenced logical output. In both cases, comparison triggers a one-directional grounding event in the design semantics that sinks the internal encoding through a dedicated discharge path. Grounding is modeled as a monotonic electrical transitionindependent of clocks, metastability, or control flow at the RTL boundary-and is intended in ASIC realizations to leave no node capable of retaining charge patterns correlated with the secret. Unlike synchronous clear-on-read or zeroization wrappers, there is no temporal window in which the value is first exposed at the logical interface and only later overwritten: in our implementation and model, the act of measurement and the logical destruction of the encoding are the same event. ENP-P thus eliminates remanence, replay, speculative duplication, and transient-execution leakage at the modeled digital interface, and is designed to provide single-use semantics for PQC decapsulation, secure boot, enclaves, and hardware security modules. ASIC-level analog grounding behavior and resistance to invasive physical attacks are design goals left to future work.