Secuirty Metrics for Logic Circuits
Author
Abstract

Measurement and Metrics Testing - Any type of engineered design requires metrics for trading off both desirable and undesirable properties. For integrated circuits, typical properties include circuit size, performance, power, etc., where for example, performance is a desirable property and power consumption is not. Security metrics, on the other hand, are extremely difficult to develop because there are active adversaries that intend to compromise the protected circuitry. This implies metric values may not be static quantities, but instead are measures that degrade depending on attack effectiveness. In order to deal with this dynamic aspect of a security metric, a general attack model is proposed that enables the effectiveness of various security approaches to be directly compared in the context of an attack. Here, we describe, define and demonstrate that the metrics presented are both meaningful and measurable.

Year of Publication
2022
Date Published
jun
Publisher
IEEE
Conference Location
McLean, VA, USA
ISBN Number
978-1-66548-532-6
URL
https://ieeexplore.ieee.org/document/9840239/
DOI
10.1109/HOST54066.2022.9840239
Google Scholar | BibTeX | DOI