Purdy, R. ., Duvalsaint, D. ., & Blanton, R. D. S. (2022). Secuirty Metrics for Logic Circuits. In (pp. 53–56). McLean, VA, USA: IEEE. http://doi.org/10.1109/HOST54066.2022.9840239 (Original work published 2024)

Purdy, R. ., Duvalsaint, D. ., & Blanton, R. D. S. (2022). Security Metrics for Logic Circuits. In 2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) (p. 53—56).